Key Laboratory of Inorganic Functional Material and Device, CAS Shanghai Institute of Ceramics, Chinese Academy of Sciences
ROLE OF INTERFACES IN FERROELECTRIC
Speaker: A. S. Sigov
MIREA – Russian Technological University, 78 Vernadsky Avenue, 119454 Moscow, Russia
联系人：李国荣 研究员 武安华 研究员
Integrated ferroelectric devices now are a growing part of semiconductor industry, for example Ferroelectric Random Access Memory (FRAM) and piezoelectric MEMS. FRAM is a nonvolatile memory with good speed and endurance, however commercial devices demonstrate a fairly low integration degree. One of the reasons of poor scaling of FRAM is a rapid degradation of ferroelectric properties with the film thickness decreasing.
This challenge is usually discussed in the framework of the dead layer model – a passive nonferroelectric layer at the metal-ferroelectric interface. It is commonly supposed, that the dead layer is a reason of properties degradation with the ferroelectric film thickness decrease, including decreasing polarization, hysteresis slope, dielectric permittivity, fatigue and other parameters.
In this work we discuss different models for estimation of the dead layer thickness at the ferroelectric film-metal interface, including the small-signal capacitance model and two methods based on dielectric hysteresis analysis—one based on slopes of the hysteresis loops at the coercive field and the new one based on comparison of dielectric hysteresis portraits. It is shown that the latter technique yields more reliable data as it excludes the effect of leakage and relaxation loss. Conductivity may have a pronounced effect on the validity of dead-layer thickness data. We report data for the dead layer thickness of the PZT films with different crystalline structure.